Monday, April 14, 2008
Products include FPGAs, CPLDs, Power Management and Clock Management Devices.
Lattice Semiconductor - FPGA CPLD
The ispMACH 4000ZE CPLD family is ideal for ultra low-power, high-volume portable applications.
Standby current as low as 10µA (typical) 1.8V core; Operational down to 1.6V VCC. Easy System Integration, Flexible multi-volt I/O.
5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI interfaces. JTAG In-System Programmable (ISPTM), On-chip user oscillator and timer,
ispMACH 4000ZE Evaluation Board
ispMACH_4000ZE ispMACH 4000ZE Family
5555 NE Moore Ct, Hillsboro, OR 97124, USA
Saturday, April 12, 2008
"Cypress delivers high-performance, mixed-signal, programmable solutions that provide customers with rapid time-to-market and exceptional system value. Cypress offerings include the PSoC Programmable System-on-Chip, USB controllers, general-purpose programmable clocks and memories......"
The CY8CKIT-001 PSoC Development Kit (DVK) provides a common development platform where you can prototype and evaluate different solutions using any one of the PSoC 1, PSoC 3, or PSoC 5 architectures.
This kit gives you a practical understanding of PSoC technology. In addition, the kit includes several example projects with step-by-step instructions to enable you to easily get started developing PSoC solutions.
Friday, April 11, 2008
Cadence RF Design Methodology Kit enables customers to rapidly address wireless opportunities by addressing system-level, verification and IC parasitic challenges.
Cadence Functional Verification Kit for ARM offers a comprehensive verification solution specifically for engineers developing ARM processor-based designs.
Cadence PSpice A/D and Advanced Analysis
Spice-based simulator for system design. It simulates complex mixed-signal designs containing both analog and digital parts, and it supports a wide range of simulation models such as IGBTs, pulse width modulators, DACs, and ADCs.
Cadence OrCAD Capture and Capture CIS
Schematic design solution, supporting both flat and hierarchal designs from the simplest to the most complex. Seamless bi-directional integration with OrCAD PCB Editor enables data synchronization and cross-probing/placing between the schematic and the board design.
Cadence Tutorial for VLSI Design
This site contains a complete on-line tutorial for a typical bottom-up design flow using CADENCE Custom IC Design Tools (version 97A). The examples were generated using the HP 0.6 um CMOS14TB process technology files, prepared at North Carolina State University (NCSU) and made available through MOSIS.
Tuesday, April 08, 2008
Design And Reuse, The Web's System On Chip Design Resource : catalogs of IPs, Virtual Components, Cores, Embedded Software and Design Tools.
- IP Reuse Station
- SoC Collaborative Platform
Tuesday, April 01, 2008
Award-winning electronics designs, circuit diagrams, ready-to-go schematics, source code especially for the Atmel's AVR family, Microchip's PIC, Motorola's 68HC09 Microcontrollers.
"The on-line versions of some of the articles I wrote for the best electronics publications"
- Alberto Ricci Bitti
Hands-on tutorial for making printed circuit boards at home, using magazine paper to replace expensive toner-transfer paper.